ABSTRACT:Quantum-dot Cellular Automata (QCA) is one of the most attractive technologies for computing at nano-scale. The full adder circuit is a basic unit in digital arithmetic and logic circuits.This design is considerably declined in terms of cell numbers and area, compared to other full adders and delay is kept at minimum Quantum-dot cellular automata (QCA) is one of the most promising solutions to design ultra low-power and very high speed digital circuits. In this paper a new QCA based, full adder is proposed.KEYWORDS: Full adder, Nano technology, Quantum-dot cellular automata, QCA cell.INTRODUCTION CMOS technology has been the industry standard for implementing Very Large Scale Integrated (VLSI) devices for the last two decades, mainly due to the consequences of miniaturization of such devices (i.e. increasing switching speeds, increasing complexity and decreasing power consumption). To overcome these problems a new nanotechnology is invented that is called quantum dot cellular automata.Quantum Cellular Automata (QCA) is only one of the many alternative technologies proposed as a replacement solution to the fundamental limits CMOS technology will impose in the years to come.In QCA digital circuits are designed in nanometer scale nowadays QCA has gained high popularity because of creating, computing devices in the Nano scale structure. Full adder is the basic building block in Arithmetic Logic Unit (ALU). The basic full adder is implemented by using one XOR and one AND gate and it performs binary addition. Designing new full adder using QCA technology plays a prominent role in most of the digital circuits.QCA IN BRIEF QCA is consisting of quantum cells; each of the cells contains four dots which are present in the corners of QCA cell. Figure1 represents the basic QCA Cell. The charge is localized in the dots. Two mobile electrons are present in the cell which can tunnel between the dots and also, the potential barrier is present between the cells. Due to this, the tunneling of electrons is not possible. Two free electrons placed at the corners of the cells, always diagonally due to Coulombic repulsion. The four dots QCA cell with quantum dot’s number (position) is shown in Figure.1. The polarization (P) of the cell is calculated by equation (1) 8. The polarization P= -1 represents binary ‘0’ and P=+1 represents binary ‘1’ ,shown in figure. 1. P=((P1+P3)-(P2+P4))/(P1+P2+P3+P4) QCA digital circuits are designed using majority gate which contains five cells in which three are inputs, one is output and other is device cell or processing cell ,which is shown in the figure.2.The logic equation for a majority gate is shown in equation (2). M(X,Y,Z) = XY + YZ + ZX. (2) By using majority gate we can design logic gates. AND and OR gate is designed by fixing one of the inputs as binary ‘0’ and ‘1’ respectively as shown in figure.3.The QCA inverter can be implemented in many ways as shown in below Fig.4QCA based, full adder:- A full adder adds three bit binary. It has a three-input (X, Y, Z) and two-output Sum and Carry. The basic formula for full adder is shown in below equation (3) (4). It consist of 5 majority gates and 3 QCA based inverters,which is shown in figure. 5 2.CARRY = MG(X, Y, Z); (3)SUM=MG (M (X ?, Y, Z), M (X, Y ? , Z), M (X, Y, Z ?)) ; (4) After proposed different 5-input majority gates. Later, a new logic equation for the sum is given by researchers 3 as shown in equation (5) (6) and Conventional Full adder is shown in figure. 6..CARRY = M (X, Y, Z); (5) SUM = M ((CARRY) ?, (CARRY) ? , X, Y, Z); (6)The proposed design of full adder depends on 3-input XOR gate. The main idea of the 3-input XOR gate is alike with 5-input majority gate as shown in figure. 7.The 3 input XOR gate contains 14 cells By placing one of the inputs as the binary 0, and the Majority Gate acts as an XOR gate.PROPOSED QCA FULL ADDER: Logical block diagram of the proposed full adder structure has shown in Fig.8. The implementation of full adder is designed by the 3 input majority gate and 3 input XOR gate.Proposed QCA based, full adder has only 25 standard cells as shown in figure. 9 and the output waveforms are shown in figure. 10.CONCLUSION This paper provides a new full adder based QCA design. The designed circuit uses minimum cells, which in turn area is reduced. Since, full adder is the basic component to perform large bit addition. With this, the proposed design has better performance when compared with other full adder designs available in the literature.